IBM Quantum said Nighthawk r2 executes over 100,000 circuits per second

IBM Quantum said on 31 August that its newest superconducting processor, Nighthawk r2, is live on IBM Quantum Platform and can execute more than 100,000 circuits per second, roughly 25 times the throughput of its Heron generation. The claim, along with every other performance figure attached to the chip, comes from a research blog post authored by Holger Haas, David McKay and Robert Davis, not a formal newsroom release. This article rests on that single statement by IBM Quantum; Gilded Age had found no independent measurement of the hardware at publication time.

What is verifiable here is that IBM said it. The numbers are IBM's account of its own machine.

What IBM put on the platform

The blog describes Nighthawk r2 as combining 120 programmable qubits, 218 couplers and 120 reset elements, 458 physical elements in total, which IBM calls the most complex quantum processor it has ever put into production. That framing matters more than the headline qubit count. The 120 figure is the number of qubits a user programs against; the couplers and reset gadgets are the plumbing that makes them usable, and IBM's own 16 July metrics post had already made the point that users interact with the 120 while hundreds of additional physical resources sit underneath.

Quantum Computing Report restated the announcement on 2 September, noting the processor is deployed on the platform under the backend name ibm_phoenix, a name that appears in the query strings of the blog's own platform links rather than in its visible text. That write-up links back to the IBM blog as its technical source. It is the same claim travelling one step further, not a second measurement.

Where the throughput comes from

The speed claim rests on how the machine clears a qubit between runs. Conventional reset checks a qubit's state and conditionally flips it; IBM says Nighthawk r2 instead uses an active dissipative reset, activating a high-dynamic-range tunable coupler that pulls the qubit's effective T1 from a median near 200 microseconds down to roughly 25 nanoseconds. That, IBM says, cuts the idle time between circuit runs to as little as a single microsecond while leaving neighbouring qubits undisturbed and preserving Heron-class gate fidelity. The blog puts the resulting cut in initialization error at around 25 times.

That last figure sits alongside an earlier, smaller one from IBM's own account. Quantum Zeitgeist, citing IBM on 15 July, reported initialization error reduced by a factor of 11 and quoted Jay Gambetta calling fast unconditional reset "a key ingredient as error correction matures." The July piece anticipated up to 100,000 circuits per second; the 31 August blog states the chip can now do it. Whether the gap between 11-fold and 25-fold reflects a real improvement over six weeks or two different ways of counting is exactly the kind of thing an independent run would settle.

The throughput itself is the more consequential number, and it is one worth taking seriously on its face. Sampling-based algorithms, error mitigation and the repeated circuit executions that error correction demands are all rate-limited by how fast a machine can reset and rerun. A 25-fold jump in circuits per second, if it holds under someone else's measurement, is the difference between an experiment that runs overnight and one that runs before lunch. IBM's hardware hub now lists Nighthawk r2 at 100-plus kHz throughput against Heron's 3.9 kHz, the same claim, published by the same organisation.

The 7,500-gate milestone

IBM also says Nighthawk r2 demonstrated accurate observable estimation, using Probabilistic Error Amplification, on circuits containing more than 7,500 gates. It presents this as meeting a target its 2026 roadmap set out in March, which stated the goal in the language of intent: Nighthawk "expected to run circuits with 7,500 gates in 2026" with up to three 120-qubit modules. Hitting a self-set roadmap number is a real thing to report, and IBM has a better record than most of shipping close to its published dates. It is still IBM certifying that IBM cleared IBM's bar.

The blog attaches this to a doped Clifford sampling experiment developed with the University of Chicago, and cites Martiel et al., arXiv:2607.25941. That paper, last revised 1 September, describes a 70-qubit, depth-70 Clifford circuit doped with 468 T gates across 97 physical qubits, yielding a state with a fidelity lower bound of 0.284 at 95 percent confidence. Its abstract names neither Nighthawk nor Heron. The blog presents an r2 rerun of that method; the cited paper is not itself an r2 hardware result, and reading it as one would overstate what has been checked.

What has and has not been measured

Every number here, the throughput, the reset timings, the initialization-error factor, the gate depth, a claimed 12-fold speedup in neutron-scattering simulations producing spectra in about 60 seconds, is IBM's own from the 31 August post. None has been reproduced by a group with nothing to gain from the result, which is the only kind of confirmation that turns a vendor's figure into a fact about the field. A logical-error picture, the count that would say what these circuits are worth for fault-tolerant work, is not part of this announcement.

The test is now available to run. Researchers can queue circuits against the processor on IBM Quantum Platform, and the 100,000-per-second claim is the sort that a third party with platform access can probe directly rather than take on trust. IBM has scheduled a webinar on 10 September titled "Quantum computing performance in practice." Until an outside group posts its own throughput and fidelity numbers, the established fact is the announcement, not the machine.